diff options
| author | Rohan McLure <rmclure@linux.ibm.com> | 2022-09-21 16:55:46 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2022-09-26 23:00:15 +1000 |
| commit | 53ecaa6778d613807e590c320ccfcf48a4114108 (patch) | |
| tree | 0b2e5f7918be97dfe9c0e48c2df02ee048ae0e5a /arch/powerpc/kernel/exceptions-64s.S | |
| parent | 15ba74502ccfd0b34dad0ea022093ccc66b334d6 (diff) | |
powerpc/64e: Clarify register saves and clears with {SAVE,ZEROIZE}_GPRS
The common interrupt handler prologue macro and the bad_stack
trampolines include consecutive sequences of register saves, and some
register clears. Neaten such instances by expanding use of the SAVE_GPRS
macro and employing the ZEROIZE_GPR macro when appropriate.
Also simplify an invocation of SAVE_GPRS targetting all non-volatile
registers to SAVE_NVGPRS.
Signed-off-by: Rohan McLure <rmclure@linux.ibm.com>
Reported-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220921065605.1051927-7-rmclure@linux.ibm.com
Diffstat (limited to 'arch/powerpc/kernel/exceptions-64s.S')
0 files changed, 0 insertions, 0 deletions