diff options
| author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2021-03-12 12:50:16 +0000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-03-29 13:22:04 +1100 |
| commit | 0512aadd750acf72b8906973c34e7092642d4323 (patch) | |
| tree | ed3c797f791999cc279f35e5a25fb11dd5d980dd /arch/powerpc/kernel/head_32.h | |
| parent | 0fc1e93481f67a49f67c9168b71842eeb0998b25 (diff) | |
powerpc/40x: Prepare normal exception handler for enabling MMU early
Ensure normal exception handler are able to manage stuff with
MMU enabled. For that we use CONFIG_VMAP_STACK related code
allthough there is no intention to really activate CONFIG_VMAP_STACK
on powerpc 40x for the moment.
40x uses SPRN_DEAR instead of SPRN_DAR and SPRN_ESR instead of
SPRN_DSISR. Take it into account in common macros.
40x MSR value doesn't fit on 15 bits, use LOAD_REG_IMMEDIATE() in
common macros that will be used also with 40x.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/01963af2b83037bca270d7bf1336ffcf35da8282.1615552866.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch/powerpc/kernel/head_32.h')
| -rw-r--r-- | arch/powerpc/kernel/head_32.h | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h index 5d4706c14572..ac6b391f1493 100644 --- a/arch/powerpc/kernel/head_32.h +++ b/arch/powerpc/kernel/head_32.h @@ -22,9 +22,17 @@ #ifdef CONFIG_VMAP_STACK mfspr r10, SPRN_SPRG_THREAD .if \handle_dar_dsisr +#ifdef CONFIG_40x + mfspr r11, SPRN_DEAR +#else mfspr r11, SPRN_DAR +#endif stw r11, DAR(r10) +#ifdef CONFIG_40x + mfspr r11, SPRN_ESR +#else mfspr r11, SPRN_DSISR +#endif stw r11, DSISR(r10) .endif mfspr r11, SPRN_SRR0 @@ -61,7 +69,7 @@ .macro EXCEPTION_PROLOG_2 handle_dar_dsisr=0 #ifdef CONFIG_VMAP_STACK - li r11, MSR_KERNEL & ~(MSR_IR | MSR_RI) /* can take DTLB miss */ + LOAD_REG_IMMEDIATE(r11, MSR_KERNEL & ~(MSR_IR | MSR_RI)) /* can take DTLB miss */ mtmsr r11 isync mfspr r11, SPRN_SPRG_SCRATCH2 @@ -158,8 +166,13 @@ .macro save_dar_dsisr_on_stack reg1, reg2, sp #ifndef CONFIG_VMAP_STACK +#ifdef CONFIG_40x + mfspr \reg1, SPRN_DEAR + mfspr \reg2, SPRN_ESR +#else mfspr \reg1, SPRN_DAR mfspr \reg2, SPRN_DSISR +#endif stw \reg1, _DAR(\sp) stw \reg2, _DSISR(\sp) #endif |