diff options
| author | Alexander Graf <agraf@suse.de> | 2014-04-29 13:36:21 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-05-30 14:26:23 +0200 |
| commit | 2e23f544135e7b5fc2f0bcb6fa935c4b4f5058b2 (patch) | |
| tree | 30e0d6ad02fdcc8433617b8d0889a41a380ac480 /arch/powerpc/kvm/book3s_emulate.c | |
| parent | e14e7a1e537d6e18f9c511f25c25c5efb7799fb5 (diff) | |
KVM: PPC: Book3S PR: Expose EBB registers
POWER8 introduces a new facility called the "Event Based Branch" facility.
It contains of a few registers that indicate where a guest should branch to
when a defined event occurs and it's in PR mode.
We don't want to really enable EBB as it will create a big mess with !PR guest
mode while hardware is in PR and we don't really emulate the PMU anyway.
So instead, let's just leave it at emulation of all its registers.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/powerpc/kvm/book3s_emulate.c')
| -rw-r--r-- | arch/powerpc/kvm/book3s_emulate.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c index e8133e5e89c6..e1165bae693a 100644 --- a/arch/powerpc/kvm/book3s_emulate.c +++ b/arch/powerpc/kvm/book3s_emulate.c @@ -441,6 +441,17 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) case SPRN_FSCR: vcpu->arch.fscr = spr_val; break; +#ifdef CONFIG_PPC_BOOK3S_64 + case SPRN_BESCR: + vcpu->arch.bescr = spr_val; + break; + case SPRN_EBBHR: + vcpu->arch.ebbhr = spr_val; + break; + case SPRN_EBBRR: + vcpu->arch.ebbrr = spr_val; + break; +#endif case SPRN_ICTC: case SPRN_THRM1: case SPRN_THRM2: @@ -551,6 +562,17 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val case SPRN_FSCR: *spr_val = vcpu->arch.fscr; break; +#ifdef CONFIG_PPC_BOOK3S_64 + case SPRN_BESCR: + *spr_val = vcpu->arch.bescr; + break; + case SPRN_EBBHR: + *spr_val = vcpu->arch.ebbhr; + break; + case SPRN_EBBRR: + *spr_val = vcpu->arch.ebbrr; + break; +#endif case SPRN_THRM1: case SPRN_THRM2: case SPRN_THRM3: |