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authorChristophe Leroy <christophe.leroy@csgroup.eu>2022-06-14 12:32:25 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2022-06-29 16:59:06 +1000
commit513f5bbac7b9ca7046bc350dd6eb39b957e338a7 (patch)
treebba6b51b33002ce7c27fe1b939956aba6e884c70 /arch/powerpc/mm/nohash/40x.c
parent56e54b4e6c477b2a7df43f9a320ae5f9a5bfb16c (diff)
powerpc/32: Remove __map_without_ltlbs
__map_without_ltlbs is used only for 40x, and only when STRICT_KERNEL_RWX, KFENCE or DEBUG_PAGEALLOC is active. Do the verification directly in 40x version of mmu_mapin_ram() and remove __map_without_ltlbs from core ppc32. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/3422094db965d218c4c3d8580f526963a9ac897f.1655202721.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch/powerpc/mm/nohash/40x.c')
-rw-r--r--arch/powerpc/mm/nohash/40x.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/powerpc/mm/nohash/40x.c b/arch/powerpc/mm/nohash/40x.c
index b32e465a3d52..3684d6e570fb 100644
--- a/arch/powerpc/mm/nohash/40x.c
+++ b/arch/powerpc/mm/nohash/40x.c
@@ -43,7 +43,6 @@
#include <mm/mmu_decl.h>
-extern int __map_without_ltlbs;
/*
* MMU_init_hw does the chip-specific initialization of the MMU hardware.
*/
@@ -94,7 +93,13 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
p = 0;
s = total_lowmem;
- if (__map_without_ltlbs)
+ if (IS_ENABLED(CONFIG_KFENCE))
+ return 0;
+
+ if (debug_pagealloc_enabled())
+ return 0;
+
+ if (strict_kernel_rwx_enabled())
return 0;
while (s >= LARGE_PAGE_SIZE_16M) {