diff options
| author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2021-04-08 15:30:27 +0000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-04-14 23:04:18 +1000 |
| commit | 131637a17dc97fde3d007ab224e30c7ff4e62f6e (patch) | |
| tree | 79544090e83c6dba48f803f952d5a047b3e7a569 /arch/powerpc/mm | |
| parent | bf26e0bbd2f82b52605cd7c880245eefe67e09f3 (diff) | |
powerpc/mem: Remove address argument to flush_coherent_icache()
flush_coherent_icache() can use any valid address as mentionned
by the comment.
Use PAGE_OFFSET as base address. This allows removing the
user access stuff.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/742b6360ae4f344a1c6ecfadcf3b6645f443fa7a.1617895813.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch/powerpc/mm')
| -rw-r--r-- | arch/powerpc/mm/cacheflush.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/arch/powerpc/mm/cacheflush.c b/arch/powerpc/mm/cacheflush.c index 742d3e0fb12f..dc2d39da6f63 100644 --- a/arch/powerpc/mm/cacheflush.c +++ b/arch/powerpc/mm/cacheflush.c @@ -5,10 +5,9 @@ /** * flush_coherent_icache() - if a CPU has a coherent icache, flush it - * @addr: The base address to use (can be any valid address, the whole cache will be flushed) * Return true if the cache was flushed, false otherwise */ -static inline bool flush_coherent_icache(unsigned long addr) +static inline bool flush_coherent_icache(void) { /* * For a snooping icache, we still need a dummy icbi to purge all the @@ -18,9 +17,7 @@ static inline bool flush_coherent_icache(unsigned long addr) */ if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) { mb(); /* sync */ - allow_read_from_user((const void __user *)addr, L1_CACHE_BYTES); - icbi((void *)addr); - prevent_read_from_user((const void __user *)addr, L1_CACHE_BYTES); + icbi((void *)PAGE_OFFSET); mb(); /* sync */ isync(); return true; @@ -60,7 +57,7 @@ static void invalidate_icache_range(unsigned long start, unsigned long stop) */ void flush_icache_range(unsigned long start, unsigned long stop) { - if (flush_coherent_icache(start)) + if (flush_coherent_icache()) return; clean_dcache_range(start, stop); @@ -146,7 +143,7 @@ static void __flush_dcache_icache(void *p) { unsigned long addr = (unsigned long)p; - if (flush_coherent_icache(addr)) + if (flush_coherent_icache()) return; clean_dcache_range(addr, addr + PAGE_SIZE); @@ -200,7 +197,7 @@ void flush_dcache_icache_page(struct page *page) } else { unsigned long addr = page_to_pfn(page) << PAGE_SHIFT; - if (flush_coherent_icache(addr)) + if (flush_coherent_icache()) return; flush_dcache_icache_phys(addr); } |