diff options
| author | Madhavan Srinivasan <maddy@linux.ibm.com> | 2021-04-08 13:15:04 +0530 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-04-19 12:22:09 +1000 |
| commit | d8a1d6c58986d8778768b15dc5bac0b4b082d345 (patch) | |
| tree | e5587fed4f4456e3efbd76375fe672272263474a /arch/powerpc/perf/isa207-common.c | |
| parent | a38cb4171928f622c8c0ab7902971516540cacad (diff) | |
powerpc/perf: Add platform specific check_attr_config
Add platform specific attr.config value checks. Patch
includes checks for both power9 and power10.
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210408074504.248211-2-maddy@linux.ibm.com
Diffstat (limited to 'arch/powerpc/perf/isa207-common.c')
| -rw-r--r-- | arch/powerpc/perf/isa207-common.c | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c index 48b2d9a5096c..bf9094d8205f 100644 --- a/arch/powerpc/perf/isa207-common.c +++ b/arch/powerpc/perf/isa207-common.c @@ -694,3 +694,45 @@ int isa207_get_alternatives(u64 event, u64 alt[], int size, unsigned int flags, return num_alt; } + +int isa3XX_check_attr_config(struct perf_event *ev) +{ + u64 val, sample_mode; + u64 event = ev->attr.config; + + val = (event >> EVENT_SAMPLE_SHIFT) & EVENT_SAMPLE_MASK; + sample_mode = val & 0x3; + + /* + * MMCRA[61:62] is Random Sampling Mode (SM). + * value of 0b11 is reserved. + */ + if (sample_mode == 0x3) + return -EINVAL; + + /* + * Check for all reserved value + * Source: Performance Monitoring Unit User Guide + */ + switch (val) { + case 0x5: + case 0x9: + case 0xD: + case 0x19: + case 0x1D: + case 0x1A: + case 0x1E: + return -EINVAL; + } + + /* + * MMCRA[48:51]/[52:55]) Threshold Start/Stop + * Events Selection. + * 0b11110000/0b00001111 is reserved. + */ + val = (event >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK; + if (((val & 0xF0) == 0xF0) || ((val & 0xF) == 0xF)) + return -EINVAL; + + return 0; +} |