diff options
| author | Dongsheng.wang@freescale.com <Dongsheng.wang@freescale.com> | 2013-04-09 10:22:30 +0800 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2013-07-01 18:38:41 -0500 |
| commit | 36ca09be6ff77a4e5b54b8b68ed7be7aa184250b (patch) | |
| tree | 599bddca2be47f3c115f9afb58bf3b9386a03104 /arch/powerpc/platforms/Kconfig | |
| parent | 5ff04b7287d87c1db74f47360365905ed9a97ff7 (diff) | |
powerpc/mpic: add global timer support
The MPIC global timer is a hardware timer inside the Freescale PIC complying
with OpenPIC standard. When the specified interval times out, the hardware
timer generates an interrupt. The driver currently is only tested on fsl chip,
but it can potentially support other global timers complying to OpenPIC
standard.
The two independent groups of global timer on fsl chip, group A and group B,
are identical in their functionality, except that they appear at different
locations within the PIC register map. The hardware timer can be cascaded to
create timers larger than the default 31-bit global timers. Timer cascade
fields allow configuration of up to two 63-bit timers. But These two groups
of timers cannot be cascaded together.
It can be used as a wakeup source for low power modes. It also could be used
as periodical timer for protocols, drivers and etc.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/platforms/Kconfig')
| -rw-r--r-- | arch/powerpc/platforms/Kconfig | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index bed8c607588c..7d07d9e8e1dd 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -86,6 +86,18 @@ config MPIC bool default n +config MPIC_TIMER + bool "MPIC Global Timer" + depends on MPIC && FSL_SOC + default n + help + The MPIC global timer is a hardware timer inside the + Freescale PIC complying with OpenPIC standard. When the + specified interval times out, the hardware timer generates + an interrupt. The driver currently is only tested on fsl + chip, but it can potentially support other global timers + complying with the OpenPIC standard. + config PPC_EPAPR_HV_PIC bool default n |