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author | Adam Buchbinder <adam.buchbinder@gmail.com> | 2016-02-24 10:51:11 -0800 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-03-01 19:27:20 +1100 |
commit | 446957ba5127141ee007fc61509e24a9e60853d9 (patch) | |
tree | 6e64ed20eaf8b4aa666eb3c77265e85f52594e50 /arch/powerpc/platforms/powernv/npu-dma.c | |
parent | 95442c64de7a6d6efe788a9820b114f6bd67fef7 (diff) |
powerpc: Fix misspellings in comments.
Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms/powernv/npu-dma.c')
-rw-r--r-- | arch/powerpc/platforms/powernv/npu-dma.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c index e85aa900f5c0..7229acd9bb3a 100644 --- a/arch/powerpc/platforms/powernv/npu-dma.c +++ b/arch/powerpc/platforms/powernv/npu-dma.c @@ -278,7 +278,7 @@ static void pnv_npu_disable_bypass(struct pnv_ioda_pe *npe) /* * Enable/disable bypass mode on the NPU. The NPU only supports one - * window per link, so bypass needs to be explicity enabled or + * window per link, so bypass needs to be explicitly enabled or * disabled. Unlike for a PHB3 bypass and non-bypass modes can't be * active at the same time. */ |