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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-07-30 16:45:20 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-07-30 16:45:20 -0700 |
| commit | e1ca4aed112b270162302d389281b6cefac60a12 (patch) | |
| tree | c490e02cc35548e23e9408620e288aa6b87e9282 /arch/powerpc/platforms | |
| parent | 6ae7d6f0195a0ec7e5d07821e62c79898cd33fdc (diff) | |
| parent | 34466c5be4dd1490acf98e6d2ff8f3728d8ca5c1 (diff) | |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc: Update defconfigs for embedded 6xx/7xxx, 8xx, 8{3,5,6}xxx
powerpc/86xx: Update GE Fanuc sbc310 default configuration
powerpc/86xx: Update defconfig for GE Fanuc's PPC9A
cpm_uart: Don't use alloc_bootmem in cpm_uart_cpm2.c
powerpc/83xx: Fix PCI IO base address on MPC837xE-RDB boards
powerpc/85xx: Don't scan for TBI PHY addresses on MPC8569E-MDS boards
powerpc/85xx: Fix ethernet link detection on MPC8569E-MDS boards
powerpc/mm: Fix SMP issue with MMU context handling code
Diffstat (limited to 'arch/powerpc/platforms')
| -rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_mds.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 60ed9c067b1d..bfb32834ab0c 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -233,6 +233,19 @@ static void __init mpc85xx_mds_setup_arch(void) /* Turn UCC1 & UCC2 on */ setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); + } else if (machine_is(mpc8569_mds)) { +#define BCSR7_UCC12_GETHnRST (0x1 << 2) +#define BCSR8_UEM_MARVELL_RST (0x1 << 1) + /* + * U-Boot mangles interrupt polarity for Marvell PHYs, + * so reset built-in and UEM Marvell PHYs, this puts + * the PHYs into their normal state. + */ + clrbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); + setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); + + setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); + clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); } iounmap(bcsr_regs); } |