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authorSagar Shrikant Kadam <sagar.kadam@sifive.com>2020-11-10 07:22:11 -0800
committerPalmer Dabbelt <palmerdabbelt@google.com>2021-01-13 20:59:16 -0800
commita0fa9d727043da2238432471e85de0bdb8a8df65 (patch)
treec3a32b8fa22259dd6f61536e21eade1bc36a8348 /arch/riscv/boot
parentbe969b7cfbcfa8a835a528f1dc467f0975c6d883 (diff)
dts: phy: add GPIO number and active state used for phy reset
The GEMGXL_RST line on HiFive Unleashed is pulled low and is using GPIO number 12. Add these reset-gpio details to dt-node using which the linux phylib can reset the phy. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/boot')
-rw-r--r--arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
index 60846e88ae4b..24d75a146e02 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
@@ -90,6 +90,7 @@
phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id0007.0771";
reg = <0>;
+ reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
};