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authorVincent Chen <vincent.chen@sifive.com>2021-03-22 22:26:04 +0800
committerPalmer Dabbelt <palmerdabbelt@google.com>2021-04-26 08:24:56 -0700
commit1a0e5dbd3723e1194cc549def69fe7b557d4c72b (patch)
tree6dc387216e93b22faaeb1ced56ce0b00b40aad8d /arch/riscv/include/asm/alternative.h
parent6f4eea90465ad0cd5f3d041b9b2c728426f2b8d4 (diff)
riscv: sifive: Add SiFive alternative ports
Add required ports of the Alternative scheme for SiFive. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv/include/asm/alternative.h')
-rw-r--r--arch/riscv/include/asm/alternative.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h
index 430bc4fea133..e625d3cafbed 100644
--- a/arch/riscv/include/asm/alternative.h
+++ b/arch/riscv/include/asm/alternative.h
@@ -32,5 +32,8 @@ struct errata_checkfunc_id {
bool (*func)(struct alt_entry *alt);
};
+void sifive_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
+ unsigned long archid, unsigned long impid);
+
#endif
#endif