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authorTony Lindgren <tony@atomide.com>2017-11-28 07:06:34 -0800
committerTony Lindgren <tony@atomide.com>2017-11-28 07:06:34 -0800
commit2db57789e6612ce0cf2fcbb577a1c8307b708566 (patch)
treedd9f9e3dffabbf5cb932fcf5055ab329ca940fa0 /arch/riscv/include/asm/cache.h
parentf0c96c6d40312b1a76cd36709dc3eb5948c1b97f (diff)
parente9a9bb4e4779ca74cb52a6e2f8acbc0881d3bb18 (diff)
Merge branch 'soc-fixes' into omap-for-v4.15/fixes
Diffstat (limited to 'arch/riscv/include/asm/cache.h')
-rw-r--r--arch/riscv/include/asm/cache.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/cache.h
new file mode 100644
index 000000000000..e8f0d1110d74
--- /dev/null
+++ b/arch/riscv/include/asm/cache.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 Chen Liqin <liqin.chen@sunplusct.com>
+ * Copyright (C) 2012 Regents of the University of California
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _ASM_RISCV_CACHE_H
+#define _ASM_RISCV_CACHE_H
+
+#define L1_CACHE_SHIFT 6
+
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
+#endif /* _ASM_RISCV_CACHE_H */