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authorPalmer Dabbelt <palmer@rivosinc.com>2024-01-09 20:14:51 -0800
committerPalmer Dabbelt <palmer@rivosinc.com>2024-01-09 20:14:51 -0800
commitcb51bfee7f62a8e26b694f9d84c0041b3e3ccc71 (patch)
tree0e8f43c6e06736675ff6c1917cc3e86fd1565f21 /arch/riscv/include/uapi/asm/hwprobe.h
parent62694797f56bf72e4c598bc0e319c7b828c1b187 (diff)
parent3359866b40a97038405c72e68097a92a4a9caa71 (diff)
Merge patch series "riscv: hwprobe: add Zicond, Zacas and Ztso support"
Clément Léger <cleger@rivosinc.com> says: This series add support for a few more extensions that are present in the RVA22U64/RVA23U64 (either mandatory or optional) and that are useful for userspace: - Zicond - Zacas - Ztso Series currently based on riscv/for-next. * b4-shazam-lts: riscv: hwprobe: export Zicond extension riscv: hwprobe: export Zacas ISA extension riscv: add ISA extension parsing for Zacas dt-bindings: riscv: add Zacas ISA extension description riscv: hwprobe: export Ztso ISA extension riscv: add ISA extension parsing for Ztso Link: https://lore.kernel.org/r/20231220155723.684081-1-cleger@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include/uapi/asm/hwprobe.h')
-rw-r--r--arch/riscv/include/uapi/asm/hwprobe.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index 12062a6345c4..9f2a8e3ff204 100644
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -56,6 +56,9 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
#define RISCV_HWPROBE_EXT_ZVFHMIN (1 << 31)
#define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
+#define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33)
+#define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)
+#define RISCV_HWPROBE_EXT_ZICOND (1ULL << 35)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)