diff options
| author | Andrew Jones <ajones@ventanamicro.com> | 2023-12-20 17:00:21 +0100 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2023-12-30 11:26:35 +0530 |
| commit | f61ce890b1f0742f17b3a5d1f8c72574a33ffeb2 (patch) | |
| tree | f17c2b49c6e15c984ed6b50effbe5a943ec4f7b6 /arch/riscv/kvm/vcpu_sbi.c | |
| parent | 5b9e41321ba919dd051c68d2a1d2c753aa61634c (diff) | |
RISC-V: KVM: Add support for SBI STA registers
KVM userspace needs to be able to save and restore the steal-time
shared memory address. Provide the address through the get/set-one-reg
interface with two ulong-sized SBI STA extension registers (lo and hi).
64-bit KVM userspace must not set the hi register to anything other
than zero and is allowed to completely neglect saving/restoring it.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/kvm/vcpu_sbi.c')
| -rw-r--r-- | arch/riscv/kvm/vcpu_sbi.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index a1997c39dfde..72a2ffb8dcd1 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -345,6 +345,8 @@ int kvm_riscv_vcpu_set_reg_sbi(struct kvm_vcpu *vcpu, reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; switch (reg_subtype) { + case KVM_REG_RISCV_SBI_STA: + return kvm_riscv_vcpu_set_reg_sbi_sta(vcpu, reg_num, reg_val); default: return -EINVAL; } @@ -370,6 +372,9 @@ int kvm_riscv_vcpu_get_reg_sbi(struct kvm_vcpu *vcpu, reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; switch (reg_subtype) { + case KVM_REG_RISCV_SBI_STA: + ret = kvm_riscv_vcpu_get_reg_sbi_sta(vcpu, reg_num, ®_val); + break; default: return -EINVAL; } |