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authorChristoph Hellwig <hch@lst.de>2018-01-04 18:35:03 +0100
committerPalmer Dabbelt <palmer@dabbelt.com>2018-01-07 15:14:39 -0800
commit1125203c13b9da32125e171b4bd75e93d4918ddd (patch)
treeb7fec011a68452c8d65526dad46fedda9056e511 /arch/riscv/mm
parentc163fb38ca34694b0cce99bb5604257bc29bf200 (diff)
riscv: rename SR_* constants to match the spec
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv/mm')
-rw-r--r--arch/riscv/mm/fault.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/mm/fault.c b/arch/riscv/mm/fault.c
index df2ca3c65048..0713f3c67ab4 100644
--- a/arch/riscv/mm/fault.c
+++ b/arch/riscv/mm/fault.c
@@ -63,7 +63,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs)
goto vmalloc_fault;
/* Enable interrupts if they were enabled in the parent context. */
- if (likely(regs->sstatus & SR_PIE))
+ if (likely(regs->sstatus & SR_SPIE))
local_irq_enable();
/*