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authorPalmer Dabbelt <palmer@sifive.com>2018-10-02 12:14:57 -0700
committerPalmer Dabbelt <palmer@sifive.com>2018-10-22 17:03:36 -0700
commitb18d6f05252d6b3f725c08d8831a46b003df5b6b (patch)
tree89b13303185ca549479c91e2d4d9ea02857d70c8 /arch/riscv
parent19ccf29bb18f08a4583aa899a8cc8c11e5ea85a6 (diff)
RISC-V: Comment on the TLB flush in smp_callin()
This isn't readily apparent from reading the code. Signed-off-by: Palmer Dabbelt <palmer@sifive.com> [Atish: code comment formatting update] Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/kernel/smpboot.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 56abab6a9812..712e9ca85904 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -106,6 +106,10 @@ asmlinkage void __init smp_callin(void)
trap_init();
notify_cpu_starting(smp_processor_id());
set_cpu_online(smp_processor_id(), 1);
+ /*
+ * Remote TLB flushes are ignored while the CPU is offline, so emit
+ * a local TLB flush right now just in case.
+ */
local_flush_tlb_all();
local_irq_enable();
preempt_disable();