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| author | Sean Anderson <sean.anderson@seco.com> | 2021-08-26 15:21:52 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-09-14 10:05:32 +0200 |
| commit | 3de536a8c365ada3481839ffe8da533c9940ea3f (patch) | |
| tree | b1a26b70ab2ee367f0c7e484d80a3276dfa4f74f /arch/sh/boot/dts/j2_mimas_v2.dts | |
| parent | f77529d9b91ac484d2ec4ad733e7594731334348 (diff) | |
dt-bindings: serial: uartlite: Add properties for synthesis-time parameters
The uartlite device is a "soft" device. Many parameters, such as baud
rate, data bits, and the presence of a parity bit are configured before
synthesis and may not be changed (or discovered) at runtime. However, we
must know what these settings are in order to properly calculate the
uart timeout (and to inform the user about the actual baud of the uart).
These properties are present for out-of-tree bindings generated by
Xilinx's tools. However, they are also (mostly) present in in-tree
bindings. I chose current-speed over xlnx,baudrate primarily because it
seemed to be used by more existing bindings. Although these properties
are marked as "required", note that only current-speed is required by
the driver itself. Hopefully, this will allow for an easier transition.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Link: https://lore.kernel.org/r/20210826192154.3202269-3-sean.anderson@seco.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/sh/boot/dts/j2_mimas_v2.dts')
0 files changed, 0 insertions, 0 deletions