diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-08-14 13:35:22 -0700 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-08-14 13:35:22 -0700 |
commit | 8652892ed44914edfb488c280ccf79301fd89117 (patch) | |
tree | 16b49cb72d4962742855ae639a82c393cbf4c158 /arch/sparc/include/asm/spitfire.h | |
parent | 5551ad1e9fad2cf06288c6e93cb95f879b8cdf5e (diff) | |
parent | ef954844c7ace62f773f4f23e28d2d915adc419f (diff) |
Merge 4.13-rc5 into staging-next
We need it here for iio fixes.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/sparc/include/asm/spitfire.h')
-rw-r--r-- | arch/sparc/include/asm/spitfire.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/spitfire.h b/arch/sparc/include/asm/spitfire.h index 1d8321c827a8..1b1286d05069 100644 --- a/arch/sparc/include/asm/spitfire.h +++ b/arch/sparc/include/asm/spitfire.h @@ -47,10 +47,26 @@ #define SUN4V_CHIP_NIAGARA5 0x05 #define SUN4V_CHIP_SPARC_M6 0x06 #define SUN4V_CHIP_SPARC_M7 0x07 +#define SUN4V_CHIP_SPARC_M8 0x08 #define SUN4V_CHIP_SPARC64X 0x8a #define SUN4V_CHIP_SPARC_SN 0x8b #define SUN4V_CHIP_UNKNOWN 0xff +/* + * The following CPU_ID_xxx constants are used + * to identify the CPU type in the setup phase + * (see head_64.S) + */ +#define CPU_ID_NIAGARA1 ('1') +#define CPU_ID_NIAGARA2 ('2') +#define CPU_ID_NIAGARA3 ('3') +#define CPU_ID_NIAGARA4 ('4') +#define CPU_ID_NIAGARA5 ('5') +#define CPU_ID_M6 ('6') +#define CPU_ID_M7 ('7') +#define CPU_ID_M8 ('8') +#define CPU_ID_SONOMA1 ('N') + #ifndef __ASSEMBLY__ enum ultra_tlb_layout { |