diff options
| author | Ingo Molnar <mingo@elte.hu> | 2008-12-31 08:14:29 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-12-31 08:14:29 +0100 |
| commit | 5fdf7e5975a0b0f6a0370655612c5dca3fd6311b (patch) | |
| tree | 639c536e818c6ace974aa285ba94576df0353b01 /arch/sparc/kernel/dtlb_miss.S | |
| parent | 7a51cffbd10886c0557677dd916c090097c691ef (diff) | |
| parent | 6a94cb73064c952255336cc57731904174b2c58f (diff) | |
Merge branch 'linus' into tracing/kmemtrace
Conflicts:
mm/slub.c
Diffstat (limited to 'arch/sparc/kernel/dtlb_miss.S')
| -rw-r--r-- | arch/sparc/kernel/dtlb_miss.S | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/sparc/kernel/dtlb_miss.S b/arch/sparc/kernel/dtlb_miss.S new file mode 100644 index 000000000000..09a6a15a7105 --- /dev/null +++ b/arch/sparc/kernel/dtlb_miss.S @@ -0,0 +1,39 @@ +/* DTLB ** ICACHE line 1: Context 0 check and TSB load */ + ldxa [%g0] ASI_DMMU_TSB_8KB_PTR, %g1 ! Get TSB 8K pointer + ldxa [%g0] ASI_DMMU, %g6 ! Get TAG TARGET + srlx %g6, 48, %g5 ! Get context + sllx %g6, 22, %g6 ! Zero out context + brz,pn %g5, kvmap_dtlb ! Context 0 processing + srlx %g6, 22, %g6 ! Delay slot + TSB_LOAD_QUAD(%g1, %g4) ! Load TSB entry + cmp %g4, %g6 ! Compare TAG + +/* DTLB ** ICACHE line 2: TSB compare and TLB load */ + bne,pn %xcc, tsb_miss_dtlb ! Miss + mov FAULT_CODE_DTLB, %g3 + stxa %g5, [%g0] ASI_DTLB_DATA_IN ! Load TLB + retry ! Trap done + nop + nop + nop + nop + +/* DTLB ** ICACHE line 3: */ + nop + nop + nop + nop + nop + nop + nop + nop + +/* DTLB ** ICACHE line 4: */ + nop + nop + nop + nop + nop + nop + nop + nop |