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authorKirill A. Shutemov <kirill.shutemov@linux.intel.com>2018-02-09 17:22:26 +0300
committerIngo Molnar <mingo@kernel.org>2018-02-11 12:36:18 +0100
commit4440977be1347d43503f381716e4918413b5a6f0 (patch)
tree2acb2738b14afa7887d4df31774fdc5c2efe6d25 /arch/x86/boot/compressed/pgtable_64.c
parent7cc4eb1bdd8b082f3d889daccd9412aa10e56165 (diff)
x86/boot/compressed/64: Introduce paging_prepare()
Rename l5_paging_required() to paging_prepare() and change the interface of the function. This is a preparation for the next patch, which would make the function also allocate memory for the 32-bit trampoline. The function now returns a 128-bit structure. RAX would return trampoline memory address (zero for now) and RDX would indicate if we need to enable 5-level paging. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> [ Typo fixes and general clarification. ] Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@suse.de> Cc: Cyrill Gorcunov <gorcunov@openvz.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Matthew Wilcox <willy@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20180209142228.21231-3-kirill.shutemov@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/boot/compressed/pgtable_64.c')
-rw-r--r--arch/x86/boot/compressed/pgtable_64.c25
1 files changed, 12 insertions, 13 deletions
diff --git a/arch/x86/boot/compressed/pgtable_64.c b/arch/x86/boot/compressed/pgtable_64.c
index b4469a37e9a1..3f1697fcc7a8 100644
--- a/arch/x86/boot/compressed/pgtable_64.c
+++ b/arch/x86/boot/compressed/pgtable_64.c
@@ -9,20 +9,19 @@
*/
unsigned long __force_order;
-int l5_paging_required(void)
-{
- /* Check if leaf 7 is supported. */
-
- if (native_cpuid_eax(0) < 7)
- return 0;
+struct paging_config {
+ unsigned long trampoline_start;
+ unsigned long l5_required;
+};
- /* Check if la57 is supported. */
- if (!(native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31))))
- return 0;
+struct paging_config paging_prepare(void)
+{
+ struct paging_config paging_config = {};
- /* Check if 5-level paging has already been enabled. */
- if (native_read_cr4() & X86_CR4_LA57)
- return 0;
+ /* Check if LA57 is desired and supported */
+ if (IS_ENABLED(CONFIG_X86_5LEVEL) && native_cpuid_eax(0) >= 7 &&
+ (native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31))))
+ paging_config.l5_required = 1;
- return 1;
+ return paging_config;
}