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| author | Luwei Kang <luwei.kang@intel.com> | 2018-10-24 16:05:08 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-12-21 11:28:33 +0100 |
| commit | 69843a913fc86b3d0ef503d6cc15886ef8943626 (patch) | |
| tree | 613ca41a89679f444d8ab8f14bde81119afb5753 /arch/x86/events/intel/pt.c | |
| parent | 61be2998ca541f7d9f487479b2ec519d83328085 (diff) | |
perf/x86/intel/pt: Add new bit definitions for PT MSRs
Add bit definitions for Intel PT MSRs to support trace output
directed to the memeory subsystem and holds a count if packet
bytes that have been sent out.
These are required by the upcoming PT support in KVM guests
for MSRs read/write emulation.
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/events/intel/pt.c')
0 files changed, 0 insertions, 0 deletions