diff options
author | Yu-cheng Yu <yu-cheng.yu@intel.com> | 2020-09-15 09:30:09 -0700 |
---|---|---|
committer | Borislav Petkov <bp@suse.de> | 2020-09-17 20:22:10 +0200 |
commit | b454feb9abc1a9ee876fb84bfea0fc8d726f5bc4 (patch) | |
tree | e4be19713b34b02b7b5dbd644f33b6fa0d3d213c /arch/x86/include/asm/fpu/xstate.h | |
parent | ff4f82816dff28ffaaff96d1409bb3811d345514 (diff) |
x86/fpu/xstate: Add supervisor PASID state for ENQCMD
The ENQCMD instruction reads a PASID from the IA32_PASID MSR. The
MSR is stored in the task's supervisor XSAVE* PASID state and is
context-switched by XSAVES/XRSTORS.
[ bp: Add (in-)definite articles and massage. ]
Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Co-developed-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/1600187413-163670-6-git-send-email-fenghua.yu@intel.com
Diffstat (limited to 'arch/x86/include/asm/fpu/xstate.h')
-rw-r--r-- | arch/x86/include/asm/fpu/xstate.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h index 14ab815132d4..47a92232d595 100644 --- a/arch/x86/include/asm/fpu/xstate.h +++ b/arch/x86/include/asm/fpu/xstate.h @@ -35,7 +35,7 @@ XFEATURE_MASK_BNDCSR) /* All currently supported supervisor features */ -#define XFEATURE_MASK_SUPERVISOR_SUPPORTED (0) +#define XFEATURE_MASK_SUPERVISOR_SUPPORTED (XFEATURE_MASK_PASID) /* * A supervisor state component may not always contain valuable information, |