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authorChang S. Bae <chang.seok.bae@intel.com>2021-10-21 15:55:24 -0700
committerBorislav Petkov <bp@suse.de>2021-10-26 10:53:02 +0200
commiteec2113eabd92b7bfbaf1033fa82dc8eb4951203 (patch)
tree2ed72a3c3792ee1a0bb9da613012992ee6e1fdc5 /arch/x86/include/asm/fpu/xstate.h
parent70c3f1671b0cbc386b387f1de33b7837e276a195 (diff)
x86/fpu/amx: Define AMX state components and have it used for boot-time checks
The XSTATE initialization uses check_xstate_against_struct() to sanity check the size of XSTATE-enabled features. AMX is a XSAVE-enabled feature, and its size is not hard-coded but discoverable at run-time via CPUID. The AMX state is composed of state components 17 and 18, which are all user state components. The first component is the XTILECFG state of a 64-byte tile-related control register. The state component 18, called XTILEDATA, contains the actual tile data, and the state size varies on implementations. The architectural maximum, as defined in the CPUID(0x1d, 1): EAX[15:0], is a byte less than 64KB. The first implementation supports 8KB. Check the XTILEDATA state size dynamically. The feature introduces the new tile register, TMM. Define one register struct only and read the number of registers from CPUID. Cross-check the overall size with CPUID again. Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211021225527.10184-21-chang.seok.bae@intel.com
Diffstat (limited to 'arch/x86/include/asm/fpu/xstate.h')
-rw-r--r--arch/x86/include/asm/fpu/xstate.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/fpu/xstate.h b/arch/x86/include/asm/fpu/xstate.h
index b7b145cad019..10adf1376f0c 100644
--- a/arch/x86/include/asm/fpu/xstate.h
+++ b/arch/x86/include/asm/fpu/xstate.h
@@ -14,6 +14,8 @@
#define XSTATE_CPUID 0x0000000d
+#define TILE_CPUID 0x0000001d
+
#define FXSAVE_SIZE 512
#define XSAVE_HDR_SIZE 64