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authorJoerg Roedel <jroedel@suse.de>2021-12-02 16:32:25 +0100
committerBorislav Petkov <bp@suse.de>2021-12-06 09:54:10 +0100
commit71d5049b053876afbde6c3273250b76935494ab2 (patch)
tree262b29644cef0c1009776942ea327eff8dbb64e9 /arch/x86/include/asm/realmode.h
parentf154f290855b070cc94dd44ad253c0ef8a9337bb (diff)
x86/mm: Flush global TLB when switching to trampoline page-table
Move the switching code into a function so that it can be re-used and add a global TLB flush. This makes sure that usage of memory which is not mapped in the trampoline page-table is reliably caught. Also move the clearing of CR4.PCIDE before the CR3 switch because the cr4_clear_bits() function will access data not mapped into the trampoline page-table. Signed-off-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211202153226.22946-4-joro@8bytes.org
Diffstat (limited to 'arch/x86/include/asm/realmode.h')
-rw-r--r--arch/x86/include/asm/realmode.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/realmode.h b/arch/x86/include/asm/realmode.h
index 5db5d083c873..331474b150f1 100644
--- a/arch/x86/include/asm/realmode.h
+++ b/arch/x86/include/asm/realmode.h
@@ -89,6 +89,7 @@ static inline void set_real_mode_mem(phys_addr_t mem)
}
void reserve_real_mode(void);
+void load_trampoline_pgtable(void);
#endif /* __ASSEMBLY__ */