diff options
| author | Vikas Shivappa <vikas.shivappa@linux.intel.com> | 2017-08-09 11:46:34 -0700 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2017-08-14 11:47:47 +0200 |
| commit | a9110b552d44fedbd1221eb0e5bde81da32d9350 (patch) | |
| tree | a39373754332e059048fc04f221a6e69d7d557ce /arch/x86/kernel/cpu/intel_rdt.c | |
| parent | eda61c265f3656be8345fdf0334b3a77829437fc (diff) | |
x86/intel_rdt: Modify the intel_pqr_state for better performance
Currently we have pqr_state and rdt_default_state which store the cached
CLOSID/RMIDs and the user configured cpu default values respectively. We
touch both of these during context switch. Put all of them in one
structure so that we can spare a cache line.
Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ravi.v.shankar@intel.com
Cc: tony.luck@intel.com
Cc: fenghua.yu@intel.com
Cc: peterz@infradead.org
Cc: eranian@google.com
Cc: sai.praneeth.prakhya@intel.com
Cc: ak@linux.intel.com
Cc: davidcc@google.com
Link: http://lkml.kernel.org/r/1502304395-7166-3-git-send-email-vikas.shivappa@linux.intel.com
Diffstat (limited to 'arch/x86/kernel/cpu/intel_rdt.c')
| -rw-r--r-- | arch/x86/kernel/cpu/intel_rdt.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c index 4b9edb2617a5..97c8d8321e04 100644 --- a/arch/x86/kernel/cpu/intel_rdt.c +++ b/arch/x86/kernel/cpu/intel_rdt.c @@ -47,8 +47,6 @@ DEFINE_MUTEX(rdtgroup_mutex); */ DEFINE_PER_CPU(struct intel_pqr_state, pqr_state); -DEFINE_PER_CPU_READ_MOSTLY(struct intel_pqr_state, rdt_cpu_default); - /* * Used to store the max resource name width and max resource data width * to display the schemata in a tabular format @@ -550,10 +548,10 @@ static void clear_closid_rmid(int cpu) { struct intel_pqr_state *state = this_cpu_ptr(&pqr_state); - per_cpu(rdt_cpu_default.closid, cpu) = 0; - per_cpu(rdt_cpu_default.rmid, cpu) = 0; - state->closid = 0; - state->rmid = 0; + state->default_closid = 0; + state->default_rmid = 0; + state->cur_closid = 0; + state->cur_rmid = 0; wrmsr(IA32_PQR_ASSOC, 0, 0); } |