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authorYazen Ghannam <yazen.ghannam@amd.com>2023-06-13 09:11:41 -0500
committerBorislav Petkov (AMD) <bp@alien8.de>2023-10-16 15:31:32 +0200
commit48da1ad8ba95ecd35d76355594c629f3ef2a954a (patch)
treee0b10f3598e06ef362ead80dc1b15ffe7d957f6d /arch/x86/kernel/cpu/mce/core.c
parent495a91d0998367f4f079593f491bdfe8ef06838e (diff)
x86/mce: Define amd_mce_usable_address()
Currently, all valid MCA_ADDR values are assumed to be usable on AMD systems. However, this is not correct in most cases. Notifiers expecting usable addresses may then operate on inappropriate values. Define a helper function to do AMD-specific checks for a usable memory address. List out all known cases. [ bp: Tone down the capitalized words. ] Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230613141142.36801-3-yazen.ghannam@amd.com
Diffstat (limited to 'arch/x86/kernel/cpu/mce/core.c')
-rw-r--r--arch/x86/kernel/cpu/mce/core.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 6f35f724cc14..06c21f571d5a 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -464,6 +464,9 @@ int mce_usable_address(struct mce *m)
if (!(m->status & MCI_STATUS_ADDRV))
return 0;
+ if (m->cpuvendor == X86_VENDOR_AMD)
+ return amd_mce_usable_address(m);
+
/* Checks after this one are Intel/Zhaoxin-specific: */
if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL &&
boot_cpu_data.x86_vendor != X86_VENDOR_ZHAOXIN)