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| author | Yazen Ghannam <Yazen.Ghannam@amd.com> | 2016-09-12 09:59:27 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-09-13 15:23:06 +0200 |
| commit | 74ab0e7a836a7df772af50cac21267eb43688841 (patch) | |
| tree | 3d23e831b87c7f3c41c1f01b77cdccd4844772d2 /arch/x86/kernel/cpu/mcheck/mce_amd.c | |
| parent | ffb173e657fa8123bffa2a169e124b4bca0b5bc4 (diff) | |
x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks()
Change MSR_IA32_MCx_MISC() macro to msr_ops.misc() because SMCA machines
define a different set of MSRs and msr_ops will give you the correct
MISC register.
Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1468269447-8808-1-git-send-email-Yazen.Ghannam@amd.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/cpu/mcheck/mce_amd.c')
| -rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index 7b7f3be783d4..78b7681f7f66 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c @@ -869,7 +869,7 @@ static int threshold_create_bank(unsigned int cpu, unsigned int bank) } } - err = allocate_threshold_blocks(cpu, bank, 0, MSR_IA32_MCx_MISC(bank)); + err = allocate_threshold_blocks(cpu, bank, 0, msr_ops.misc(bank)); if (!err) goto out; |