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authorArnd Bergmann <arnd@arndb.de>2012-03-06 16:12:13 +0000
committerArnd Bergmann <arnd@arndb.de>2012-03-06 16:12:26 +0000
commit6b60805502fecc5ce05dad68fd242c4f3a1d1f1b (patch)
treea53537e00ede0a31b8f9f91c1d79d1e1a6670797 /arch/x86/kernel/cpu/perf_event.h
parent4c75aab698d4b7cc08f3a5dd329fc7e9af3d0e3c (diff)
parentaf829310e8a914ad17ed61a7b18b14b4f457bca1 (diff)
Merge branch 'fixes' of git://github.com/hzhuang1/linux into fixes
* 'fixes' of git://github.com/hzhuang1/linux: (3 commits) ARM: pxa: fix invalid mfp pin issue ARM: pxa: remove duplicated registeration on pxa-gpio ARM: pxa: add dummy clock for pxa25x and pxa27x Includes an update to v3.3-rc6
Diffstat (limited to 'arch/x86/kernel/cpu/perf_event.h')
-rw-r--r--arch/x86/kernel/cpu/perf_event.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 8944062f46e2..c30c807ddc72 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -147,7 +147,9 @@ struct cpu_hw_events {
/*
* AMD specific bits
*/
- struct amd_nb *amd_nb;
+ struct amd_nb *amd_nb;
+ /* Inverted mask of bits to clear in the perf_ctr ctrl registers */
+ u64 perf_ctr_virt_mask;
void *kfree_on_online;
};
@@ -417,9 +419,11 @@ void x86_pmu_disable_all(void);
static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
u64 enable_mask)
{
+ u64 disable_mask = __this_cpu_read(cpu_hw_events.perf_ctr_virt_mask);
+
if (hwc->extra_reg.reg)
wrmsrl(hwc->extra_reg.reg, hwc->extra_reg.config);
- wrmsrl(hwc->config_base, hwc->config | enable_mask);
+ wrmsrl(hwc->config_base, (hwc->config | enable_mask) & ~disable_mask);
}
void x86_pmu_enable_all(int added);