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authorRobert Marko <robert.marko@sartura.hr>2021-11-17 15:02:22 +0100
committerMaxime Ripard <maxime@cerno.tech>2021-11-17 16:40:50 +0100
commit08d2061ff9c5319a07bf9ca6bbf11fdec68f704a (patch)
treefbe42020d311ff51092021fe00e6824f3d8445c6 /arch/x86/kernel/setup.c
parentfa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf (diff)
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its currently set to plain RGMII mode meaning that it doesn't introduce delays. With this setup, TX packets are completely lost and changing the mode to RGMII-ID so the PHY will add delays internally fixes the issue. Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus") Acked-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Ron Goossens <rgoossens@gmail.com> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211117140222.43692-1-robert.marko@sartura.hr
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