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| author | Yu-cheng Yu <yu-cheng.yu@intel.com> | 2020-05-12 07:54:38 -0700 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2020-05-13 12:16:47 +0200 |
| commit | 71581eefd7a0a81b1af7d7c93641925a01d70a9a (patch) | |
| tree | 511c503706b17b0c5948c39df21c3ab21377e7f8 /arch/x86/kernel/signal.c | |
| parent | 524bb73bc15c56f5587e33c817e103a259b019d2 (diff) | |
x86/fpu/xstate: Introduce XSAVES supervisor states
Enable XSAVES supervisor states by setting MSR_IA32_XSS bits according
to CPUID enumeration results. Also revise comments at various places.
Co-developed-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/20200512145444.15483-5-yu-cheng.yu@intel.com
Diffstat (limited to 'arch/x86/kernel/signal.c')
0 files changed, 0 insertions, 0 deletions