diff options
| author | Feng Tang <feng.tang@intel.com> | 2021-11-17 10:37:50 +0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2021-12-02 00:40:35 +0100 |
| commit | c7719e79347803b8e3b6b50da8c6db410a3012b5 (patch) | |
| tree | 851a038a2a0cfacb46dae67a15837fb308834dd8 /arch/x86/kernel/tsc.c | |
| parent | 52d0b8b18776f184c53632c5e0068201491cdb61 (diff) | |
x86/tsc: Add a timer to make sure TSC_adjust is always checked
The TSC_ADJUST register is checked every time a CPU enters idle state, but
Thomas Gleixner mentioned there is still a caveat that a system won't enter
idle [1], either because it's too busy or configured purposely to not enter
idle.
Setup a periodic timer (every 10 minutes) to make sure the check is
happening on a regular base.
[1] https://lore.kernel.org/lkml/875z286xtk.fsf@nanos.tec.linutronix.de/
Fixes: 6e3cd95234dc ("x86/hpet: Use another crystalball to evaluate HPET usability")
Requested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: "Paul E. McKenney" <paulmck@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20211117023751.24190-1-feng.tang@intel.com
Diffstat (limited to 'arch/x86/kernel/tsc.c')
0 files changed, 0 insertions, 0 deletions