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authorRobert Richter <robert.richter@amd.com>2008-07-22 21:09:04 +0200
committerIngo Molnar <mingo@elte.hu>2008-07-26 11:48:11 +0200
commit543a157bbdfae8eb997506031c3b2d4d17957098 (patch)
tree81b101321497df2dc0b1f32536ede78cb935b1e6 /arch/x86/oprofile
parent87f0baccc2e4f194c931186d3c8499314494a484 (diff)
x86/oprofile: op_model_athlon.c: fix counter reset when reenabling IBS OP
Signed-off-by: Robert Richter <robert.richter@amd.com> Cc: oprofile-list <oprofile-list@lists.sourceforge.net> Cc: Barry Kasindorf <barry.kasindorf@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/oprofile')
-rw-r--r--arch/x86/oprofile/op_model_athlon.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/oprofile/op_model_athlon.c b/arch/x86/oprofile/op_model_athlon.c
index a3a2058c372c..9c8c8c583132 100644
--- a/arch/x86/oprofile/op_model_athlon.c
+++ b/arch/x86/oprofile/op_model_athlon.c
@@ -251,6 +251,7 @@ op_amd_handle_ibs(struct pt_regs * const regs,
(unsigned int *)&ibs_op,
IBS_OP_BEGIN);
rdmsr(MSR_AMD64_IBSOPCTL, low, high);
+ high = 0;
low &= ~IBS_OP_LOW_VALID_BIT;
low |= IBS_OP_LOW_ENABLE;
wrmsr(MSR_AMD64_IBSOPCTL, low, high);