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authorJarkko Sakkinen <jarkko.sakkinen@intel.com>2012-05-08 21:22:46 +0300
committerH. Peter Anvin <hpa@linux.intel.com>2012-05-08 15:04:27 -0700
commitcda846f101fb1396b6924f1d9b68ac3d42de5403 (patch)
tree1fa8716c308b8e10156a1caf51d8ff6c98eceea9 /arch/x86/realmode
parentbf8b88e97716feb750c3d34492f00d9c085e1183 (diff)
x86, realmode: read cr4 and EFER from kernel for 64-bit trampoline
This patch changes 64-bit trampoline so that CR4 and EFER are provided by the kernel instead of using fixed values. Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@intel.com> Link: http://lkml.kernel.org/r/1336501366-28617-24-git-send-email-jarkko.sakkinen@intel.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/realmode')
-rw-r--r--arch/x86/realmode/rm/header.S1
-rw-r--r--arch/x86/realmode/rm/trampoline_64.S32
-rw-r--r--arch/x86/realmode/rm/trampoline_common.S19
3 files changed, 27 insertions, 25 deletions
diff --git a/arch/x86/realmode/rm/header.S b/arch/x86/realmode/rm/header.S
index b4c32632bf16..4612d5382791 100644
--- a/arch/x86/realmode/rm/header.S
+++ b/arch/x86/realmode/rm/header.S
@@ -9,6 +9,7 @@
.section ".header", "a"
+ .balign 16
GLOBAL(real_mode_header)
.long pa_text_start
.long pa_ro_end
diff --git a/arch/x86/realmode/rm/trampoline_64.S b/arch/x86/realmode/rm/trampoline_64.S
index 3f7293239365..66e26f088288 100644
--- a/arch/x86/realmode/rm/trampoline_64.S
+++ b/arch/x86/realmode/rm/trampoline_64.S
@@ -34,9 +34,9 @@
#include "realmode.h"
.text
- .balign PAGE_SIZE
.code16
+ .balign PAGE_SIZE
ENTRY(trampoline_start)
cli # We should be safe anyway
wbinvd
@@ -65,8 +65,8 @@ ENTRY(trampoline_start)
* to 32 bit.
*/
- lidtl tidt # load idt with 0, 0
- lgdtl tgdt # load gdt with whatever is appropriate
+ lidtl tr_idt # load idt with 0, 0
+ lgdtl tr_gdt # load gdt with whatever is appropriate
movw $__KERNEL_DS, %dx # Data segment descriptor
@@ -93,16 +93,17 @@ ENTRY(startup_32)
movl %edx, %fs
movl %edx, %gs
- movl $X86_CR4_PAE, %eax
+ movl pa_tr_cr4, %eax
movl %eax, %cr4 # Enable PAE mode
# Setup trampoline 4 level pagetables
movl $pa_trampoline_pgd, %eax
movl %eax, %cr3
+ # Set up EFER
+ movl pa_tr_efer, %eax
+ movl pa_tr_efer + 4, %edx
movl $MSR_EFER, %ecx
- movl $((1 << _EFER_LME) | (1 << _EFER_NX)), %eax # Enable Long Mode
- xorl %edx, %edx
wrmsr
# Enable paging and in turn activate Long Mode
@@ -124,23 +125,4 @@ ENTRY(startup_64)
# Now jump into the kernel using virtual addresses
jmpq *tr_start(%rip)
- .section ".rodata","a"
- .balign 16
-tidt:
- .word 0 # idt limit = 0
- .word 0, 0 # idt base = 0L
-
- # Duplicate the global descriptor table
- # so the kernel can live anywhere
- .balign 16
- .globl tgdt
-tgdt:
- .short tgdt_end - tgdt - 1 # gdt limit
- .long pa_tgdt
- .short 0
- .quad 0x00cf9b000000ffff # __KERNEL32_CS
- .quad 0x00af9b000000ffff # __KERNEL_CS
- .quad 0x00cf93000000ffff # __KERNEL_DS
-tgdt_end:
-
#include "trampoline_common.S"
diff --git a/arch/x86/realmode/rm/trampoline_common.S b/arch/x86/realmode/rm/trampoline_common.S
index c3f951c468c5..cac444b942f8 100644
--- a/arch/x86/realmode/rm/trampoline_common.S
+++ b/arch/x86/realmode/rm/trampoline_common.S
@@ -1,5 +1,20 @@
.section ".rodata","a"
+#ifdef CONFIG_X86_64
+ # Duplicate the global descriptor table
+ # so the kernel can live anywhere
+ .balign 16
+ .globl tr_gdt
+tr_gdt:
+ .short tr_gdt_end - tr_gdt - 1 # gdt limit
+ .long pa_tr_gdt
+ .short 0
+ .quad 0x00cf9b000000ffff # __KERNEL32_CS
+ .quad 0x00af9b000000ffff # __KERNEL_CS
+ .quad 0x00cf93000000ffff # __KERNEL_DS
+tr_gdt_end:
+#endif
+
.balign 4
tr_idt: .fill 1, 6, 0
@@ -8,12 +23,16 @@ tr_idt: .fill 1, 6, 0
.balign 4
GLOBAL(trampoline_status) .space 4
+ .balign 8
GLOBAL(trampoline_header)
#ifdef CONFIG_X86_32
tr_start: .space 4
+ tr_gdt_pad: .space 2
tr_gdt: .space 6
#else
tr_start: .space 8
+ GLOBAL(tr_cr4) .space 4
+ GLOBAL(tr_efer) .space 8
#endif
END(trampoline_header)