diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2012-10-15 03:55:38 +0400 |
|---|---|---|
| committer | Chris Zankel <chris@zankel.net> | 2012-10-15 21:48:08 -0700 |
| commit | bc5378fcba974317f9657c4fdc78af227e1e1068 (patch) | |
| tree | 998b8f8badf1d7a5dc0fd796f3e8501f8c5394ae /arch/xtensa/include/asm/coprocessor.h | |
| parent | f4349b6e01c8927a04795885702a173b6a60573c (diff) | |
xtensa: reorganize SR referencing
- reference SRs by names where possible, not by numbers;
- get rid of __stringify around SR names where possible;
- remove unneeded SR names from asm/regs.h;
- add SREG_ prefix to remaining SR names;
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'arch/xtensa/include/asm/coprocessor.h')
| -rw-r--r-- | arch/xtensa/include/asm/coprocessor.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/xtensa/include/asm/coprocessor.h b/arch/xtensa/include/asm/coprocessor.h index 75c94a1658b0..677501b32dfc 100644 --- a/arch/xtensa/include/asm/coprocessor.h +++ b/arch/xtensa/include/asm/coprocessor.h @@ -94,11 +94,10 @@ #if XCHAL_HAVE_CP #define RSR_CPENABLE(x) do { \ - __asm__ __volatile__("rsr %0," __stringify(CPENABLE) : "=a" (x)); \ + __asm__ __volatile__("rsr %0, cpenable" : "=a" (x)); \ } while(0); #define WSR_CPENABLE(x) do { \ - __asm__ __volatile__("wsr %0," __stringify(CPENABLE) "; rsync" \ - :: "a" (x)); \ + __asm__ __volatile__("wsr %0, cpenable; rsync" :: "a" (x)); \ } while(0); #endif /* XCHAL_HAVE_CP */ |