diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2016-01-24 10:32:10 +0300 |
|---|---|---|
| committer | Chris Zankel <chris@zankel.net> | 2016-03-11 08:53:32 +0000 |
| commit | c91e02bd9702f2c00c6a6dc82dec1b2d5bb9f039 (patch) | |
| tree | 7ffa9530078b594c2ad0ea97259abe15e9dd9619 /arch/xtensa/kernel/traps.c | |
| parent | 6ec7026ac01f3db039e0428db1f37590685ad3e7 (diff) | |
xtensa: support hardware breakpoints/watchpoints
Use perf framework to manage hardware instruction and data breakpoints.
Add two new ptrace calls: PTRACE_GETHBPREGS and PTRACE_SETHBPREGS to
query and set instruction and data breakpoints.
Address bit 0 choose instruction (0) or data (1) break register, bits
31..1 are the register number.
Both calls transfer two 32-bit words: address (0) and control (1).
Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
'trigger on load, bits 29..0 are length. Length 0 is used to clear a
breakpoint. To set a breakpoint length must be a power of 2 in the range
1..64 and the address must be length-aligned.
Introduce new thread_info flag: TIF_DB_DISABLED. Set it if debug
exception is raised by the kernel code accessing watched userspace
address and disable corresponding data breakpoint. On exit to userspace
check that flag and, if set, restore all data breakpoints.
Handle debug exceptions raised with PS.EXCM set. This may happen when
window overflow/underflow handler or fast exception handler hits data
breakpoint, in which case save and disable all data breakpoints,
single-step faulting instruction and restore data breakpoints.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/kernel/traps.c')
| -rw-r--r-- | arch/xtensa/kernel/traps.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c index e4764f216a7a..d02fc304b31c 100644 --- a/arch/xtensa/kernel/traps.c +++ b/arch/xtensa/kernel/traps.c @@ -39,6 +39,7 @@ #include <asm/pgtable.h> #include <asm/processor.h> #include <asm/traps.h> +#include <asm/hw_breakpoint.h> /* * Machine specific interrupt handlers @@ -338,9 +339,22 @@ do_unaligned_user (struct pt_regs *regs) } #endif +/* Handle debug events. + * When CONFIG_HAVE_HW_BREAKPOINT is on this handler is called with + * preemption disabled to avoid rescheduling and keep mapping of hardware + * breakpoint structures to debug registers intact, so that + * DEBUGCAUSE.DBNUM could be used in case of data breakpoint hit. + */ void do_debug(struct pt_regs *regs) { +#ifdef CONFIG_HAVE_HW_BREAKPOINT + int ret = check_hw_breakpoint(regs); + + preempt_enable(); + if (ret == 0) + return; +#endif __die_if_kernel("Breakpoint in kernel", regs, SIGKILL); /* If in user mode, send SIGTRAP signal to current process */ |