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| author | Max Filippov <jcmvbkbc@gmail.com> | 2014-01-29 07:53:44 +0400 |
|---|---|---|
| committer | Max Filippov <jcmvbkbc@gmail.com> | 2014-02-21 21:33:44 +0400 |
| commit | 2bc2fde63858322a942864bf6cb2d54f5aa33186 (patch) | |
| tree | a2459c8d679d4d3c05f8d0126ae9bbbe16179fd4 /arch/xtensa/platforms | |
| parent | cdc9af7ccfc26d35ff8a29dded2cc2c096c0fc1e (diff) | |
xtensa: xtfpga: set ethoc clock frequency
Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC
base frequency in the platform data in case of build w/o CONFIG_OF.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'arch/xtensa/platforms')
| -rw-r--r-- | arch/xtensa/platforms/xtfpga/setup.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c index 03729132ae44..57fd08b36f51 100644 --- a/arch/xtensa/platforms/xtfpga/setup.c +++ b/arch/xtensa/platforms/xtfpga/setup.c @@ -290,6 +290,7 @@ static int __init xtavnet_init(void) * knows whether they set it correctly on the DIP switches. */ pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr); + ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR; return 0; } |