diff options
| author | Yangbo Lu <yangbo.lu@nxp.com> | 2017-05-09 10:37:06 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2017-05-15 09:34:52 +0800 |
| commit | a87b843dc44b85afbacf113357e2e4c6b0f98572 (patch) | |
| tree | 6f98983700400099e9b6805fc0c08955fbf02b2d /arch | |
| parent | 9f6c20981e03607bd789be1e231e52b87b7e0ca7 (diff) | |
arm64: dts: ls1046a: support SD UHS-I and eMMC HS200 on RDB
This patch is to enable SD UHS-I mode and eMMC HS200 mode on
LS1046ARDB in dts. Also, the eSDHC peripheral clock must be used
instead of platform clock to support these modes.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 8 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 4 |
2 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts index c5361e91ecc1..2d2872638abc 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts @@ -72,6 +72,14 @@ status = "okay"; }; +&esdhc { + mmc-hs200-1_8v; + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; +}; + &i2c0 { status = "okay"; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 7ef2b9f33e1b..5975d3002f27 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -210,10 +210,10 @@ }; esdhc: esdhc@1560000 { - compatible = "fsl,esdhc"; + compatible = "fsl,ls1046a-esdhc", "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; - clock-frequency = <0>; + clocks = <&clockgen 2 1>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; big-endian; |