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authorJavier Martinez Canillas <javier.martinez@collabora.co.uk>2013-05-10 21:31:10 +0200
committerBenoit Cousson <benoit.cousson@linaro.org>2013-06-18 18:53:36 -0500
commit7f674b3fcf63cd289813d2c1d95e5dfb0f267963 (patch)
tree39fc7cec09f4911a38b9a0c324882eb04a4c70d7 /arch
parentd72b4415011e3b5949bf03973ac633d2e36bad0d (diff)
ARM: dts: omap3-igep0020: Add NAND flash support
The IGEPv2 board has an 512MB NAND flash memory. Add a device node for this NAND and its partition layout. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/omap3-igep0020.dts50
1 files changed, 49 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts
index 4bac32e77be4..0ba43136a37f 100644
--- a/arch/arm/boot/dts/omap3-igep0020.dts
+++ b/arch/arm/boot/dts/omap3-igep0020.dts
@@ -68,7 +68,55 @@
};
&gpmc {
- ranges = <5 0 0x2c000000 0x1000000>;
+ ranges = <0 0 0x00000000 0x20000000>,
+ <5 0 0x2c000000 0x01000000>;
+
+ nand@0,0 {
+ linux,mtd-name= "micron,mt29c4g96maz";
+ reg = <0 0 0>;
+ nand-bus-width = <16>;
+ ti,nand-ecc-opt = "bch8";
+
+ gpmc,sync-clk-ps = <0>;
+ gpmc,cs-on-ns = <0>;
+ gpmc,cs-rd-off-ns = <44>;
+ gpmc,cs-wr-off-ns = <44>;
+ gpmc,adv-on-ns = <6>;
+ gpmc,adv-rd-off-ns = <34>;
+ gpmc,adv-wr-off-ns = <44>;
+ gpmc,we-off-ns = <40>;
+ gpmc,oe-off-ns = <54>;
+ gpmc,access-ns = <64>;
+ gpmc,rd-cycle-ns = <82>;
+ gpmc,wr-cycle-ns = <82>;
+ gpmc,wr-access-ns = <40>;
+ gpmc,wr-data-mux-bus-ns = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "SPL";
+ reg = <0 0x100000>;
+ };
+ partition@0x80000 {
+ label = "U-Boot";
+ reg = <0x100000 0x180000>;
+ };
+ partition@0x1c0000 {
+ label = "Environment";
+ reg = <0x280000 0x100000>;
+ };
+ partition@0x280000 {
+ label = "Kernel";
+ reg = <0x380000 0x300000>;
+ };
+ partition@0x780000 {
+ label = "Filesystem";
+ reg = <0x680000 0x1f980000>;
+ };
+ };
+
ethernet@5,0 {
pinctrl-names = "default";
pinctrl-0 = <&smsc911x_pins>;