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authorChen-Yu Tsai <wens@csie.org>2021-01-04 16:19:17 +0800
committerMaxime Ripard <maxime@cerno.tech>2021-04-07 13:40:54 +0200
commitfbb9e86636ba8aa4d890091ab06cc7b2f4751322 (patch)
treeef713082a5106294607e06f665629b16361e0a1f /arch
parenta38fd8748464831584a19438cbb3082b5a2dab15 (diff)
arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices
The macros for the clock and reset indices for the RSB hardware block were replaced with raw numbers when the RSB controller node was added. This was done to avoid cross-tree dependencies. Now that both the clk and DT changes have been merged, we can switch back to using the macros. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 49e979794094..af8b7d0ef750 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -995,9 +995,9 @@
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x07083000 0x400>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu 13>;
+ clocks = <&r_ccu CLK_R_APB2_RSB>;
clock-frequency = <3000000>;
- resets = <&r_ccu 7>;
+ resets = <&r_ccu RST_R_APB2_RSB>;
pinctrl-names = "default";
pinctrl-0 = <&r_rsb_pins>;
status = "disabled";