diff options
| author | Robert Marko <robert.marko@sartura.hr> | 2021-11-17 15:02:22 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2021-11-17 16:40:50 +0100 |
| commit | 08d2061ff9c5319a07bf9ca6bbf11fdec68f704a (patch) | |
| tree | fbe42020d311ff51092021fe00e6824f3d8445c6 /arch | |
| parent | fa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf (diff) | |
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its
currently set to plain RGMII mode meaning that it doesn't introduce
delays.
With this setup, TX packets are completely lost and changing the mode to
RGMII-ID so the PHY will add delays internally fixes the issue.
Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Ron Goossens <rgoossens@gmail.com>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211117140222.43692-1-robert.marko@sartura.hr
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts index d13980ed7a79..7ec5ac850a0d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts @@ -69,7 +69,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; |