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authorMarkos Chandras <markos.chandras@imgtec.com>2015-08-13 09:56:33 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-09-03 12:08:14 +0200
commit400bd2e41393a783e0532321fdb369d2cc15ea26 (patch)
treeb076f48638fe9a5f104a33b28e57e5ecf9246d7a /arch
parent83d43305a1df2aa2976e3ccf012e4cf0dc29673d (diff)
MIPS: math-emu: Add support for the MIPS R6 RINT FPU instruction
MIPS R6 introduced the following instruction: Floating-Point Round to Integral Scalar floating-point round to integral floating point value. RINT.fmt: FPR[fd] = round_int(FPR[fs]) Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10958/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/math-emu/cp1emu.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 54964b372992..a348cbefe4a8 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -1791,6 +1791,18 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
break;
}
+ case frint_op: {
+ union ieee754sp fs;
+
+ if (!cpu_has_mips_r6)
+ return SIGILL;
+
+ SPFROMREG(fs, MIPSInst_FS(ir));
+ rv.l = ieee754sp_tlong(fs);
+ rv.s = ieee754sp_flong(rv.l);
+ goto copcsr;
+ }
+
case fabs_op:
handler.u = ieee754sp_abs;
goto scopuop;
@@ -2037,6 +2049,18 @@ copcsr:
break;
}
+ case frint_op: {
+ union ieee754dp fs;
+
+ if (!cpu_has_mips_r6)
+ return SIGILL;
+
+ DPFROMREG(fs, MIPSInst_FS(ir));
+ rv.l = ieee754dp_tlong(fs);
+ rv.d = ieee754dp_flong(rv.l);
+ goto copcsr;
+ }
+
case fabs_op:
handler.u = ieee754dp_abs;
goto dcopuop;