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authorVineet Gupta <vgupta@synopsys.com>2013-01-18 15:12:20 +0530
committerVineet Gupta <vgupta@synopsys.com>2013-02-15 23:15:56 +0530
commit450dd430bf45ab212a91acfb9bed2528d17f30cd (patch)
treedeaf7d7aef0616834e804de041eea9de3e0a52c8 /arch
parent999159a5381bff3bd6f688c5d20fbec9d8789e53 (diff)
ARC: [DeviceTree] Convert some Kconfig items to runtime values
* mem size now runtime configured (prev CONFIG_ARC_PLAT_SDRAM_SIZE) * core cpu clk runtime configured (prev CONFIG_ARC_PLAT_CLK) Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch')
-rw-r--r--arch/arc/Kconfig12
-rw-r--r--arch/arc/boot/dts/skeleton.dtsi6
-rw-r--r--arch/arc/include/asm/clk.h2
-rw-r--r--arch/arc/kernel/clk.c12
-rw-r--r--arch/arc/kernel/devtree.c13
-rw-r--r--arch/arc/mm/init.c9
6 files changed, 37 insertions, 17 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 76668579b543..7db978570fb8 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -249,10 +249,6 @@ source "arch/arc/plat-arcfpga/Kconfig"
#New platform adds here
-config ARC_PLAT_CLK
- int "Clk speed in Hz"
- default "80000000"
-
config LINUX_LINK_BASE
hex "Linux Link Address"
default "0x80000000"
@@ -266,14 +262,6 @@ config LINUX_LINK_BASE
Linux needs to be scooted a bit.
If you don't know what the above means, leave this setting alone.
-config ARC_PLAT_SDRAM_SIZE
- hex "SD RAM Size"
- default "0x10000000"
- help
- Implies the amount of SDRAM/DRAM Linux is going to claim/own.
- The actual memory itself could be larger than this number. But for
- all software purposes, this is the amt of memory.
-
endmenu # "Platform Board Configuration"
config ARC_STACK_NONEXEC
diff --git a/arch/arc/boot/dts/skeleton.dtsi b/arch/arc/boot/dts/skeleton.dtsi
index 9b357d802a10..eb8b77367352 100644
--- a/arch/arc/boot/dts/skeleton.dtsi
+++ b/arch/arc/boot/dts/skeleton.dtsi
@@ -13,9 +13,13 @@
/ {
compatible = "snps,arc";
+ clock-frequency = <80000000>; /* 80 MHZ */
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases { };
- memory { device_type = "memory"; reg = <0 0>; };
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>; /* 256M */
+ };
};
diff --git a/arch/arc/include/asm/clk.h b/arch/arc/include/asm/clk.h
index 61956436c75c..bf9d29f5bd53 100644
--- a/arch/arc/include/asm/clk.h
+++ b/arch/arc/include/asm/clk.h
@@ -17,4 +17,6 @@ static inline unsigned long arc_get_core_freq(void)
return core_freq;
}
+extern int arc_set_core_freq(unsigned long);
+
#endif
diff --git a/arch/arc/kernel/clk.c b/arch/arc/kernel/clk.c
index 64925db9eb5e..66ce0dc917fb 100644
--- a/arch/arc/kernel/clk.c
+++ b/arch/arc/kernel/clk.c
@@ -8,4 +8,14 @@
#include <asm/clk.h>
-unsigned long core_freq = CONFIG_ARC_PLAT_CLK;
+unsigned long core_freq = 800000000;
+
+/*
+ * As of now we default to device-tree provided clock
+ * In future we can determine this in early boot
+ */
+int arc_set_core_freq(unsigned long freq)
+{
+ core_freq = freq;
+ return 0;
+}
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index 48e157efad15..c8166dc02c38 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -15,6 +15,7 @@
#include <linux/of.h>
#include <linux/of_fdt.h>
#include <asm/prom.h>
+#include <asm/clk.h>
/* called from unflatten_device_tree() to bootstrap devicetree itself */
void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
@@ -34,7 +35,9 @@ int __init setup_machine_fdt(void *dt)
struct boot_param_header *devtree = dt;
unsigned long dt_root;
char *model, *compat;
+ void *clk;
char manufacturer[16];
+ unsigned long len;
/* check device tree validity */
if (be32_to_cpu(devtree->magic) != OF_DT_HEADER)
@@ -60,5 +63,15 @@ int __init setup_machine_fdt(void *dt)
/* Retrieve various information from the /chosen node */
of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line);
+ /* Initialize {size,address}-cells info */
+ of_scan_flat_dt(early_init_dt_scan_root, NULL);
+
+ /* Setup memory, calling early_init_dt_add_memory_arch */
+ of_scan_flat_dt(early_init_dt_scan_memory, NULL);
+
+ clk = of_get_flat_dt_prop(dt_root, "clock-frequency", &len);
+ if (clk)
+ arc_set_core_freq(of_read_ulong(clk, len/4));
+
return 0;
}
diff --git a/arch/arc/mm/init.c b/arch/arc/mm/init.c
index 682cf5740483..caf797de23fc 100644
--- a/arch/arc/mm/init.c
+++ b/arch/arc/mm/init.c
@@ -25,7 +25,7 @@ char empty_zero_page[PAGE_SIZE] __aligned(PAGE_SIZE);
EXPORT_SYMBOL(empty_zero_page);
/* Default tot mem from .config */
-static unsigned long arc_mem_sz = CONFIG_ARC_PLAT_SDRAM_SIZE;
+static unsigned long arc_mem_sz = 0x20000000; /* some default */
/* User can over-ride above with "mem=nnn[KkMm]" in cmdline */
static int __init setup_mem_sz(char *str)
@@ -41,7 +41,8 @@ early_param("mem", setup_mem_sz);
void __init early_init_dt_add_memory_arch(u64 base, u64 size)
{
- pr_err("%s(%llx, %llx)\n", __func__, base, size);
+ arc_mem_sz = size & PAGE_MASK;
+ pr_info("Memory size set via devicetree %ldM\n", TO_MB(arc_mem_sz));
}
/*
@@ -62,7 +63,9 @@ void __init setup_arch_memory(void)
/*
* We do it here, so that memory is correctly instantiated
- * even if "mem=xxx" cmline over-ride is not given
+ * even if "mem=xxx" cmline over-ride is given and/or
+ * DT has memory node. Each causes an update to @arc_mem_sz
+ * and we finally add memory one here
*/
memblock_add(CONFIG_LINUX_LINK_BASE, arc_mem_sz);