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authorMagnus Damm <damm@opensource.se>2012-01-30 11:25:07 +0900
committerPaul Mundt <lethal@linux-sh.org>2012-02-24 13:24:59 +0900
commit74eb436ec057e31e35addda35f9b94ee813cb633 (patch)
tree509dc2c4cf06d5a6bf2ad067c66c40fda7f09587 /arch
parent689189fb014203965ed89833d8d5566424540c9d (diff)
ARM: mach-shmobile: r8a7779 PFC IPSR4 fix
Fix the bit field width information for the IPSR4 register in the r8a7779 pin function controller (PFC). Without this fix the Marzen board fails to receive data over the serial console due to misconfigured pin function for the RX pin. Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-shmobile/pfc-r8a7779.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/pfc-r8a7779.c b/arch/arm/mach-shmobile/pfc-r8a7779.c
index 963532f2b2c4..d14c9b048077 100644
--- a/arch/arm/mach-shmobile/pfc-r8a7779.c
+++ b/arch/arm/mach-shmobile/pfc-r8a7779.c
@@ -2120,7 +2120,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
FN_AUDATA3, 0, 0, 0 }
},
{ PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
- 3, 1, 1, 1, 1, 1, 1, 3, 3, 1,
+ 3, 1, 1, 1, 1, 1, 1, 3, 3,
1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
/* IP4_31_29 [3] */
FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,