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authorRon Economos <w6rz@comcast.net>2021-12-30 22:11:06 -0800
committerPalmer Dabbelt <palmer@rivosinc.com>2022-01-20 09:37:23 -0800
commitdb3f02df1853acf4d678bcddb3f1eab23219b410 (patch)
treec891cc3d778e0192900e8bb0ae85938419d8750a /arch
parent3c2905ea79245fd37c2ab9d9384ab85d4732e3ef (diff)
riscv: dts: sifive unmatched: Add gpio poweroff
Some of the GPIO pins on the Unmatched are wire up to control the power of the board, indicate that in the device tree. Signed-off-by: Ron Economos <w6rz@comcast.net> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
index 6bfa1f24d3de..c4ed9efdff03 100644
--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
@@ -39,6 +39,11 @@
clock-frequency = <RTCCLK_FREQ>;
clock-output-names = "rtcclk";
};
+
+ gpio-poweroff {
+ compatible = "gpio-poweroff";
+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+ };
};
&uart0 {