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authorJohnny Huang <johnny_huang@aspeedtech.com>2022-03-29 10:39:31 -0700
committerJoel Stanley <joel@jms.id.au>2022-04-13 11:53:52 +0930
commite194aff0066ddbbea3654b742c1286d914b12492 (patch)
tree586319f6f9abe9c2cb604cb61e40544a1c20bdf5 /arch
parent5da3ae69987a92c009263e38a0b1842fa879c7a0 (diff)
ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi
Add FWSPIDQ2 and FWSPIDQ3 group to support AST2600 FW SPI quad mode. These pins can be used with dedicated FW SPI pins - FWSPICS0#, FWSPICK, FWSPIMOSI and FWSPIMISO. Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20220329173932.2588289-7-quic_jaehyoo@quicinc.com Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
index 06d60a8540e9..47c3fb137cbc 100644
--- a/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
@@ -117,6 +117,11 @@
groups = "FWSPID";
};
+ pinctrl_fwqspi_default: fwqspi_default {
+ function = "FWQSPI";
+ groups = "FWQSPI";
+ };
+
pinctrl_fwspiwp_default: fwspiwp_default {
function = "FWSPIWP";
groups = "FWSPIWP";