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authorChao Xie <xiechao.mail@gmail.com>2012-07-31 14:13:11 +0800
committerHaojian Zhuang <haojian.zhuang@gmail.com>2012-08-16 16:16:17 +0800
commitfa79b8d6a2f38bf2c612acf38787a7fcf60c5db7 (patch)
tree0f3104ca394ef10980b5f6c7fa553b49f16e0bfb /arch
parent5967b546dd7142e7747993bb4c79422cd7b6f34f (diff)
ARM: cache: add cputype.h for tauros2
Signed-off-by: Chao Xie <xiechao.mail@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mm/cache-tauros2.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c
index 97e2ac81399f..4b787bba2b58 100644
--- a/arch/arm/mm/cache-tauros2.c
+++ b/arch/arm/mm/cache-tauros2.c
@@ -17,6 +17,7 @@
#include <linux/init.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
+#include <asm/cputype.h>
#include <asm/hardware/cache-tauros2.h>
@@ -161,8 +162,6 @@ static void __init disable_l2_prefetch(void)
static inline int __init cpuid_scheme(void)
{
- extern int processor_id;
-
return !!((processor_id & 0x000f0000) == 0x000f0000);
}
@@ -191,7 +190,6 @@ static inline void __init write_actlr(u32 actlr)
void __init tauros2_init(void)
{
- extern int processor_id;
char *mode = NULL;
disable_l2_prefetch();