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authorAriel D'Alessandro <ariel.dalessandro@collabora.com>2021-11-19 12:32:47 -0300
committerMark Brown <broonie@kernel.org>2021-11-22 15:43:02 +0000
commitc5d22d5e12e776fee4e346dc098fe51d00c2f983 (patch)
treea37901008edb5b6269da8476527a3b26146dfc3a /certs
parent6e6752a9c78738e27bde6da5cefa393b589276bb (diff)
ASoC: tlv320aic31xx: Handle BCLK set as PLL input configuration
If BCLK is used as PLL input, the sysclk is determined by the hw params. So it must be updated here to match the input frequency, based on sample rate, format and channels. Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/r/20211119153248.419802-5-ariel.dalessandro@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'certs')
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