diff options
| author | Hans de Goede <hdegoede@redhat.com> | 2019-10-24 23:38:26 +0200 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-10-25 11:43:08 +0200 |
| commit | cefe6aac29ff608a244f8cc9ba6bcfe12ee9c1f3 (patch) | |
| tree | f119f7be7e82edef9b6164582fe31e0583b0f1f2 /drivers/acpi/Makefile | |
| parent | ed852cde25a12ea3b6fcc3afc746f773154d0bc5 (diff) | |
ACPI / PMIC: Add Cherry Trail Crystal Cove PMIC OpRegion driver
We have no docs for the CHT Crystal Cove PMIC. The Asus Zenfone-2 kernel
code has 2 Crystal Cove regulator drivers, one calls the PMIC a "Crystal
Cove Plus" PMIC and talks about Cherry Trail, so presuambly that one
could be used to get register info for the regulators if we need to
implement regulator support in the future.
For now the sole purpose of this driver is to make
intel_soc_pmic_exec_mipi_pmic_seq_element work on devices with a
CHT Crystal Cove PMIC.
Specifically this fixes the following MIPI PMIC sequence related errors
on e.g. an Asus T100HA:
[ 178.211801] intel_soc_pmic_exec_mipi_pmic_seq_element: No PMIC registered
[ 178.211897] [drm:intel_dsi_dcs_init_backlight_funcs [i915]] *ERROR* mipi_exec_pmic failed, error: -6
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/acpi/Makefile')
| -rw-r--r-- | drivers/acpi/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index ee59b1db69a1..68853f23e901 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -110,6 +110,7 @@ obj-$(CONFIG_ACPI_EXTLOG) += acpi_extlog.o obj-$(CONFIG_PMIC_OPREGION) += pmic/intel_pmic.o obj-$(CONFIG_BYTCRC_PMIC_OPREGION) += pmic/intel_pmic_bytcrc.o +obj-$(CONFIG_CHTCRC_PMIC_OPREGION) += pmic/intel_pmic_chtcrc.o obj-$(CONFIG_XPOWER_PMIC_OPREGION) += pmic/intel_pmic_xpower.o obj-$(CONFIG_BXT_WC_PMIC_OPREGION) += pmic/intel_pmic_bxtwc.o obj-$(CONFIG_CHT_WC_PMIC_OPREGION) += pmic/intel_pmic_chtwc.o |