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authorChristopher Covington <cov@codeaurora.org>2016-11-02 11:11:27 -0500
committerBjorn Helgaas <helgaas@kernel.org>2016-12-06 13:45:49 -0600
commit2ca5b8ddc6f70d77a51851ba5e5cd0d39c27dd88 (patch)
treec0fdc10e9412d7d47ad027660015c49267346cea /drivers/acpi/pci_mcfg.c
parent169de969c0188be69bd5ff1e148d42a49bf47738 (diff)
PCI: Add MCFG quirks for Qualcomm QDF2432 host controller
The Qualcomm Technologies QDF2432 SoC does not support accesses smaller than 32 bits to the PCI configuration space. Register the appropriate quirk. [bhelgaas: add QCOM_ECAM32 macro, ifdef for ACPI and PCI_QUIRKS] Signed-off-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/acpi/pci_mcfg.c')
-rw-r--r--drivers/acpi/pci_mcfg.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/acpi/pci_mcfg.c b/drivers/acpi/pci_mcfg.c
index 1ef72857b710..cee33b078d3d 100644
--- a/drivers/acpi/pci_mcfg.c
+++ b/drivers/acpi/pci_mcfg.c
@@ -51,6 +51,17 @@ struct mcfg_fixup {
static struct mcfg_fixup mcfg_quirks[] = {
/* { OEM_ID, OEM_TABLE_ID, REV, SEGMENT, BUS_RANGE, ops, cfgres }, */
+
+#define QCOM_ECAM32(seg) \
+ { "QCOM ", "QDF2432 ", 1, seg, MCFG_BUS_ANY, &pci_32b_ops }
+ QCOM_ECAM32(0),
+ QCOM_ECAM32(1),
+ QCOM_ECAM32(2),
+ QCOM_ECAM32(3),
+ QCOM_ECAM32(4),
+ QCOM_ECAM32(5),
+ QCOM_ECAM32(6),
+ QCOM_ECAM32(7),
};
static char mcfg_oem_id[ACPI_OEM_ID_SIZE];