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authorShawn Guo <shawn.guo@freescale.com>2014-05-17 20:46:01 +0800
committerTejun Heo <tj@kernel.org>2014-05-19 16:06:50 -0400
commit3685f2516116c5f3b9d498d531955ad70216ad84 (patch)
tree022e032cea06b2052608b59a6cab36692a48f2d1 /drivers/ata/ahci_imx.c
parent2af89a3cde1beb88a2c65e0558d828c1a9e4677f (diff)
ahci: imx: PLL clock needs 100us to settle down
The commit e783c51 (ahci: imx: software workaround for phy reset issue in resume) calls imx_sata_phy_reset() to reset phy immediately after SATA MPLL is enabled. It seems working fine mostly, but fails in some case as below. ... ahci-imx 2200000.sata: failed to reset phy: -110 ahci-imx: probe of 2200000.sata failed with error -110 After talking to the designer, we learnt that when enabling i.MX6Q SATA MPLL, we need to wait 100us for it to settle down for safety. Add this required delay to fix above failure. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers/ata/ahci_imx.c')
-rw-r--r--drivers/ata/ahci_imx.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
index 5824d99e63fd..8befeb69eeb1 100644
--- a/drivers/ata/ahci_imx.c
+++ b/drivers/ata/ahci_imx.c
@@ -258,6 +258,8 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv)
IMX6Q_GPR13_SATA_MPLL_CLK_EN,
IMX6Q_GPR13_SATA_MPLL_CLK_EN);
+ usleep_range(100, 200);
+
ret = imx_sata_phy_reset(hpriv);
if (ret) {
dev_err(dev, "failed to reset phy: %d\n", ret);